Description

Description

* Work with design teams, DFT, CAD, and product engineering to design experiments, analyze results and refine design methodologies applied across all silicon design at Apple. * Data mining and analysis of silicon data to establish correlation metrics to design closure activities including Static Timing Analysis * Develop and deploy design closure margins and methodologies targeted to optimize power/performance tradeoffs which have material impact on the final products

Minimum Qualifications

• Minimum requirement of BS + 10 years of relevant industry experience
• Coding experience in one or more of C, Perl, Python, or Tcl

Preferred Qualifications

• Experience working in static timing analysis, DFT, physical design, failure analysis or CAD
• Static Timing Analysis with Primetime, Tempus, or equivalent
• Solid C, Perl, Python or Tcl coding/debug skills coupled with an understanding of the design challenges in advanced technology nodes
• Fundamentals of statistics, hypothesis testing, data mining, Machine Learning and Design of Experiments.
• Prior exposure to DFT, Tetramax, Tessent, silicon debug, or semiconductor processing is a plus.

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