Description

Description

As a CPU Physical Design Engineer, you will drive or participate in the following: • Drive RTL-to-GDS design convergence through logic synthesis and place-and-route tools targeting ambitious PPA goals • Will be responsible for block-level physical design delivery along with closure of backend flows, electrical requirements and improving silicon yield • Will work closely with internal CAD and PD methodology teams on industry-standard synthesis/PNR tool features and optimizations and their adoption in CPU design • Will work with x-functional top-level teams on the aspects of CPU floorplan, timing, power, reliability, and testability • Will work closely with custom IP teams to define and co-optimize memory macros, library standard cells to improve design PPA

Minimum Qualifications

• Minimum BS and 10+ years of relevant industry experience
• Experience in logic design and digital circuits
• Experience with Perl or TCL

Preferred Qualifications

• Experience in low power, high frequency physical design techniques leveraging advanced syn/PnR tool features, and best in class physical design methodology
• Experience using industry standard logic Synthesis, PnR, STA and Power analysis tools, along with timing budgeting, floor-planning, physical integration, and verification to converge complex designs
• Knowledge in deep sub-micron technology, along with its implications to timing, power, and area
• Excellent communication and interpersonal skills
• Ability to work independently and/or lead a physical design partition in collaboration with x-functional teams

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