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Apple
Austin, Texas, United States
(on-site)
Posted
16 days ago
Apple
Austin, Texas, United States
(on-site)
Job Function
Engineering
Formal Verification Engineer
The insights provided are generated by AI and may contain inaccuracies. Please independently verify any critical information before relying on it.
Formal Verification Engineer
The insights provided are generated by AI and may contain inaccuracies. Please independently verify any critical information before relying on it.
Description
DescriptionAs a formal verification engineer working the complete formal verification for single or multiple design blocks and IP's (CPU, Cellular and Connectivity IP, Audio and Image Processing IP, Neural Networks IP, Memory/DMA Controller, Security IP, Peripheral IP, Interconnects, Power management subsystems, etc.), you will be responsible for: - Working with Apple Silicon's world-class Security Enclave design engineers to develop a formal micro-architecture specification - Developing comprehensive formal verification test plan that includes unique security requirement verification - Proving properties of the design, finding design bugs, and working closely with design teams to help improve the micro-architecture. - Crafting novel and creative solutions for modelling security attacks and proving robustness of complex design micro-architectures - Developing and implementing re-usable and optimized formal models and verification code base - Architecting correct-by-construction design methodologies for improved formal verification efficiency and productivity.
Minimum Qualifications
- A minimum of a bachelor's degree and a minimum of 3 years of relevant industry experience in silicon validation software engineering or related field.
Preferred Qualifications
- Hands on experience with VLSI and digital logic design and verification techniques or formal methods and their application to hardware, software, or systems
- Interest in learning and becoming an expert in SoC, CPU, GPU, or Cellular designs.
- Detail oriented approach and desire to overcome challenges is required.
- Formal Method or Formal Verification technologies knowledge is a plus.
- Knowledge and experience in interpreting hardware specifications.
- Temporal logic assertion-based languages such as SVA or PSL.
- Experience in using EDA formal tools and tool development experience is plus.
- Proficiency in any scripting language with excellent debugging skills.
- Excellent interpersonal skills.
- Passionate about developing world-class/innovative formal verification solutions.
- Exposure to CPU instruction-set architectures, memory consistency or cache coherence principles
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant .
Job ID: 80715637

Apple
Cupertino
,
California
,
United States
We’re a diverse collective of thinkers and doers, continually reimagining what’s possible to help us all do what we love in new ways. The people who work here have reinvented entire industries with the Mac, iPhone, iPad, and Apple Watch, as well as with services, including Apple TV, the App Store, Apple Music, and Apple Pay. And the same innovation that goes into our products also applies to our practices — strengthening our commitment to leave the world better than we found it.
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