Description

Description

In this role you will: - Work with the design team to review and enhance specifications. - Develop verification plans in coordination with design leads, verification leads and micro-architects. - Develop and drive to completion formal verification across multiple design blocks. - Conduct formal verification reviews with design and verification teams. - Handle deliverables and work with multi-functional teams to support product requirements. - Create automated flows and infrastructure for formal verification. - Work with other block and core level engineers to ensure seamless verification flow.

Minimum Qualifications

• BS degree in Computer Science, Computer Engineering, Electrical Engineering or equivalent field + 3 years of relevant experience.
• Experience with CPU or GPU design architectures, VLSI circuits, and digital logic design.
• Experience with formal verification tools, such as JasperGold, IFV, etc.
• Experience in programming/scripting languages.

Preferred Qualifications

• Experience with HDLs such as Verilog/System Verilog and temporal logic assertion-based languages such as SVA.
• Experience in formal verification and analysis of pipelined micro-architectures, MMUs, and cache coherency control mechanisms.
• Experience with abstraction techniques and formal verification technologies.
• Experience in reviewing and interpreting design specifications.
• Experience using academic formal verification tools.
• Knowledge of constrained random verification methods.
• Ability to collaborate across multiple teams.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant .